1. Field of the Invention
The present invention relates to a display apparatus which displays data such as graphic data, and more particularly to a display apparatus which a can be recovered quickly from a trouble when a fault has occurred.
2. Description of the Related Art
A conventional display apparatus has a display processing unit which generates display data and outputs it to a display unit. As a method of recovering the display apparatus when some fault occurs in the above-mentioned display processing unit, there would be a method of restarting an application and a method of manually replacing the display processing unit in which the fault has occurred, into a new display processing unit by an operator.
However, in the above-mentioned conventional example, when the fault has occurred in the display processing unit, the recovery of the display processing apparatus takes a long time. Therefore, data cannot be displayed from the occurrence of the fault to the recovery of the display apparatus.
Also, when the recovery of the display processing unit cannot be expected and the display apparatus needs to be manually replaced to a new display apparatus by the operator, the recovery of the system takes a long time.
In conjunction with the above description, an image processing apparatus using distributed frame memories of a parallel computer is disclosed in Japanese Laid Open Patent application (JP-A-Heisei 5-173941). The image processing apparatus is comprised of a plurality of processing units, distributed frame memories provided to store image data for every processing unit, and a display unit which outputs a display sync signal for the display in a screen to the distributed frame memories and which displays the image data transferred from each distributed frame memory on the screen. The distributed frame memories are connected in series and a transfer bus transfers the image data to the display unit in order. A display frame memory is provided between the display unit and each distributed frame memory. In the display frame memory, a transfer request section issues an image data transfer request to each distributed frame memory based on a display sync signal which is outputted from the display unit. The frame memory section stores image data transferred from each distributed frame memory through the transfer bus in response to the transfer request from the transfer request section for one frame. The memory control unit controls the read and write of each image data to the frame memory section. The memory control unit takes synchronization of the read timing of each image data with the timing of the display sync signal when each image data is read out from the frame memory section.
Also, a graphic display unit is disclosed in Japanese Laid Open Patent application (JP-A-Heisei 9-50533). In this reference, the generation of the noise caused due to a previous un-processed command in a frame buffer switched to a new display mode is prevented while a mode switching period by a mode switching section is kept constant. In the graphic display unit, a display section generates pixel data based on a display command from a host processing unit. A pair of frame buffers stores the pixel data generated by the display section. A display section displays the pixel data stored in the frame buffer. A mode switching section switches the frame buffers to the modes which are different each other between a display mode to write the pixel data from the display section and a display mode which outputs the written pixel data to the display section. A reset section is provided to stop the generation operation of the pixel data by the display section and an operation signal to the mode switching section is used as a reset signal the reset section.
Also, a display apparatus is disclosed in Japanese Laid Open Patent Application (JP-P2000-29456A). In this reference, the display apparatus is comprised of a graphic display section which has a double buffer, a display control unit which carries out branch processing such as display data generation processing, write processing to the double buffer, and a screen switch processing, a register which stores elapsed time from the time of the screen switching which is carried out in synchronism with a vertical sync signal, and a table in which a processing content corresponding to each of time ranges is set. The elapsed time is acquired from the register every frame when the display processing ends, and divided into the time ranges. The display control processing acquires the elapsed time from the register at the end of the display processing and stores the processing contents corresponding to the elapsed time in the table, precedes in the display data generation of the next frame when the elapsed time exceeds a time limit in which delay is taken into account by a predetermined value. In a real time animation display, it is prevented that the display processing is delayed due to high load
Also, a display apparatus is disclosed in Japanese Laid Open Patent Application (JP-P2000-172482A). The display unit in this reference is comprised of a computer system of at least 2 systems which control an image signal, a switching section which switches the computer systems, and a display section which displays a screen based on the image signal transmitted by the switched computer system. Each computer system is comprised of a display storage section which stores the image signal to transmit to the display section. The switching section reads the image signal stored in the display storage section for the display section to display the data. When the computer system transmitting the image signal is breaks down, the display storage section belonging to the broken-down computer system is compulsorily stopped in the update of the memory contents, until the switching section switches the other computer system to the display section after the processing for handing over of the image signal to the other switched computer system end. The display section displays the screen corresponding to the image signal before the computer system broke down.
Also, a parallel display apparatus is disclosed in Japanese Laid Open Patent Application (JP-P2000-267651A). In this reference, a display instruction and data generating mechanism distributes a display instruction and data to the display apparatus in units of screens to a window for the display content to be changed. Each display apparatus carries out a display operation to a display memory in the display apparatus in accordance with the display instruction and the data. The content of the display memory is read out in response to a signal synchronized with the scan of a display 7 outputted from the display control. A window number of the window displayed at present is outputted from a window number buffer. A unit number of the display unit which outputs the latest display data for the window with the above window number is outputted from a window number and display unit management table. The display switching unit selects display data from the display unit with the unit number.